Application Note: I/O Expansion for COTS-based Embedded Systems
May 03, 2013Download PDF
Curtiss-Wright has a variety of I/O interface products available to meet a wide array of application requirements, including rugged deployed applications. For adding these various interfaces, Peripheral Component Interconnect (PCI), PCI-X and PCI Express® (PCIe) connectivity are normal interfaces, as many standard modules of XMC (VITA 42), PMC (IEEE 1386), VITA 20 (conductioncooled PMC) and VITA 39 (PCI-X) have followed to include an easy physical addition of daughter cards to the standard embedded open standards based hosts (VME, cPCI, VPX™/OpenVPX™).
By employing the PMC or XMC sites on the single board computers (SBCs), or using an expansion carrier like the VPX3-215 and VPX6-215 to expand the PCIe bus from an SBC to the expansion slot(s), additional PMCs and XMCs can be added to the connected SBC's processor to add various I/O. For 3U and 6U VPX, the host SBC will normally have sufficient bandwidth between 2.5Ghz of x4 Lanes (total of 10Gbps) on the PCIe Gen 1 capable modules to provide for various I/O. With the use of higher rate links like PCIe Gen 2, more data bandwidth is also possible with the same physical solution as in PCIe Gen 1. As PCIe still behaves as PCI, the peripheral devices can only be connected to a single host processor as it provides the ability for I/O and control from that single processor's memory and interrupt controller. But, multiple devices can be connected to a single host processor so long as the memory size supports the desired set of I/O devices and response timing is within acceptable limits per the architecture.
As multiple PMC/XMCs can support the various additional I/O, a variety of architectures can be created that support specific application requirements. Systems that capture incoming camera or radar data over various formats can feed general processors or FPGAs. This data can be combined with related data to track, record, transmit and display for a mission. For applications that require the performance of multiple processors, data can also be shared over buses such as Serial RapidIO® (SRIO) or Gigabit Ethernet, depending on bandwidth and latency requirements.