SOSA is the Key to Resolving Today’s Interoperability, Flexibility, and SWaP-C Challenges
The SOSA Consortium creates a common framework for transitioning sensor systems to an open systems architecture. With so many existing and emerging sensor systems to consider, the Consortium’s goal to “allow flexibility in the selection and acquisition of sensors and subsystems that provide sensor data collection, processing, exploitation, communication, and related functions over the full life cycle of the C4ISR system” is extremely important.
The SOSA standards initiative was initially developed as part of the Future Airborne Capability Environment (FACE™) consortium. SOSA standards are compatible with FACE and OMS standards, and they leverage a number of VITA standards, including VITA 65, the OpenVPX standard that ensures interoperability among the COTS solutions that are used to create subsystems and systems.
As well, the C4ISR/EW Modular Open Suite of Standards (CMOSS) falls under the SOSA umbrella. CMOSS defines sharing mechanisms across software, hardware, and network layers. To define these mechanisms, CMOSS standards leverage the
- Vehicle Integration for C4ISR/EW Interoperability (VICTORY) standards for network interoperability
- OpenVPX standard for combining cards in a common chassis
- Modular Open RF Architecture (MORA) standard for sharing RF resources
- FACE standard for software portability
Read our white paper, Why an Open Standards Approach Is Essential in Defense and Aerospace: Exploring MOSA, SOSA, FACE, VICTORY, and more, to learn more about these standards and their relevance to the 2019 tri-services memorandum from the U.S. military.
Our solutions reduce risks, lower costs, and speed deployment of the applications warfighters need most. Some of our most sophisticated, ruggedized COTS processing solutions are developed in alignment with the SOSA Technical Standard:
- VPX3-1260, a high-performance 3U OpenVPX SBC featuring the latest 8th Gen Intel Xeon E processor with integrated graphics
- VPX3-663, a versatile building block that combines a PCI Express (PCIe) Gen 3 switch with a 10G backplane Ethernet switch in a single 3U card
- CHAMP-XD1S, a ruggedized, multi-core digital signal processing (DSP) engine that allows High Performance Embedded Computing (HPEC) systems to take full advantage of today’s leading-edge Intel Xeon processor D architecture with advanced security
- VPX3-1707, a high-performance 3U OpenVPX SBC featuring an NXP Arm LX2160A processor with cutting-edge real-time processing capabilities
Stay tuned for future announcements of products aligned with the SOSA Technical Standard.
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